Modified Convolutional Interleavers for Parallel Concatenated Block Codes

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    Abstract

    The letter presents a modification on the block-wise operation of convolutional interleavers for the Parallel Concatenated Block (PCB) codes. Interleaving is conducted so that every block of the interleaved data includes one bit of a message block. This leads to determining the minimum weight of PCB codes from messages with weight 1. Due to the insertion of some stuff bits in the permutation process, multiplicities of the minimum weight of the PCB’s constituent code is less than that obtained from the previously proposed interleavers. This improves the performance of code in its error floor region.

    Original languageEnglish
    Pages (from-to)1469-1473
    Number of pages5
    JournalIEEE Communications Letters
    Volume26
    Issue number7
    DOIs
    Publication statusPublished - 1 Jul 2022

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