TY - JOUR
T1 - Towards Energy Efficient Approx Cache-coherence Protocol Verified using Model Checker
AU - Saraswat, Anant
AU - Abhishek, Kumar
AU - Ghalib, Muhammad Rukunuddin
AU - Shankar, Achyut
AU - Alazab, Mamoun
AU - Nongpoh, Bernard
N1 - Funding Information:
This paper is an outcome of the R&D work undertaken project under the Visvesvaraya PhD Scheme of the Ministry of Electronics & Information Technology, Government of India, being implemented by Digital India Corporation. We are thankful to the computer science departments of the National Institute of Technology Patna and the National Institute of Technology Meghalaya for the opportunity to scale this theory on a simulator. We are thankful to the anonymous reviewers who gave us the motivation to improve this paper.
Publisher Copyright:
© 2021
PY - 2022/1
Y1 - 2022/1
N2 - The end of Moore's law and Dennard scaling is shifting the typical computing paradigm towards Approximate Computing. This paper aims to explain an enhanced version of the MESI(Modified Exclusive Shared Invalid) cache coherence protocol using approximation and verifying its correctness with a model checker. In this proposed MESI-A(MESI-APPROX) cache coherence protocol, we subdivide the data into two parts: an approximate and precise one. By ignoring coherence communication for approximate data, the proposed model gains performance and saves energy. We formally verified MESI and MESI-A protocol using LTL (Linear Temporal Logic) and PCTL (Probabilistic Computational Tree Logic) specifications. On PARSEC 3.0 (Princeton Application Repository for Shared-Memory Computers) benchmark suite using TEJAS (The Efficient Java-Based Architectural Simulator), the improved protocol is performing efficiently with 5 per cent to 20 per cent approximated data with various applications. The energy gain is in correlation with the application's nature, but every application shows significant improvement.
AB - The end of Moore's law and Dennard scaling is shifting the typical computing paradigm towards Approximate Computing. This paper aims to explain an enhanced version of the MESI(Modified Exclusive Shared Invalid) cache coherence protocol using approximation and verifying its correctness with a model checker. In this proposed MESI-A(MESI-APPROX) cache coherence protocol, we subdivide the data into two parts: an approximate and precise one. By ignoring coherence communication for approximate data, the proposed model gains performance and saves energy. We formally verified MESI and MESI-A protocol using LTL (Linear Temporal Logic) and PCTL (Probabilistic Computational Tree Logic) specifications. On PARSEC 3.0 (Princeton Application Repository for Shared-Memory Computers) benchmark suite using TEJAS (The Efficient Java-Based Architectural Simulator), the improved protocol is performing efficiently with 5 per cent to 20 per cent approximated data with various applications. The energy gain is in correlation with the application's nature, but every application shows significant improvement.
KW - Approx cache coherence
KW - Approximate computing
KW - Formal Verification
KW - LTL
KW - MESI-A
KW - Model checking
KW - PCTL
UR - http://www.scopus.com/inward/record.url?scp=85119200483&partnerID=8YFLogxK
U2 - 10.1016/j.compeleceng.2021.107482
DO - 10.1016/j.compeleceng.2021.107482
M3 - Article
AN - SCOPUS:85119200483
SN - 0045-7906
VL - 97
SP - 1
EP - 12
JO - Computers and Electrical Engineering
JF - Computers and Electrical Engineering
M1 - 107482
ER -